通信電路原理

第1章 緒論
1．1 通信系統(tǒng)的基本概念
1．1．1 通信系統(tǒng)的組成
1．1．2 通信系統(tǒng)的基本特性
1.1．3 通信系統(tǒng)的信道
1．1．4 通信系統(tǒng)中的信號
1．1．5 通信系統(tǒng)中的發(fā)送與接收設(shè)備
1．2 信號傳輸?shù)幕締栴}
1．2．1 信號通過線性系統(tǒng)
1．2．2 信號通過非線性系統(tǒng)
1．2．3 干擾
1．3 通信電路的基本形式
1．4 關(guān)于本書的內(nèi)容
1．4．1 關(guān)于信號變換的理論和技術(shù)
1．4．2 關(guān)于電路
第2章 濾波器
2．1 引言
2．2 濾波器的特性和分類
2．2．1 濾波器的特性
2．2．2 濾波器的分類
2．3 LC濾波器；
2．3.1 LC串、并聯(lián)諧振回路
2．3．2 般LC濾波器
2．4 聲表面波濾波器
2．5 有源RC濾波器
2．5．1 構(gòu)成有源RC濾波器的單元電路
2．5．2 運(yùn)算仿真法實(shí)現(xiàn)有源RC濾波器
2. 5．3 級聯(lián)法實(shí)現(xiàn)有源RC濾波器(x)
2．5．4 自動(dòng)校正有源RC濾波器(x)
2．6 抽樣數(shù)據(jù)濾波器(x)
2．6．1 抽樣數(shù)據(jù)單元電路
2．6．2 抽樣數(shù)據(jù)濾波器
2．6．3 連續(xù)域到離散域的映射
2．7 小結(jié)
習(xí)題
第3章 高頻放大器
3．1 引言
3．2 晶體管的高頻小信號等效電路和參數(shù)
3．2．1 雙極型晶體管混合x型等效電路和參數(shù)
3．2．2 場效應(yīng)管的等效電路和參數(shù)
3．2．3 晶體管的y參數(shù)等效電路
3．3 高頻小信號寬帶放大器
3．3．1 概述
3．3．2 共發(fā)射極放大器
3．3．3 共基極放大器
3．3．4 共發(fā)共基級聯(lián)電路
3．3．5 場效應(yīng)管高頻小信號放大器
3．3．6 展寬頻帶的措施(x)
3．3．7 自動(dòng)增益控制(ACC)電路
3．4 放大器的噪聲
3．4．1 電阻的熱噪聲
3．4．2 電子器件的噪聲
3．4．3 噪聲系數(shù)
3．4．4 接收機(jī)的靈敏度與最小可檢測信號
3．4．5 噪聲溫度
3．4．6 低噪聲放大器(x)
3．5 寬帶功率放大器(x)
3．5．1 A類功率放大器的基本電路特性
3．5．2 B類與AB類功率放大器
3．5．3 傳輸線變壓器
3．5．4 寬頻帶放大器晶體管工作狀態(tài)的選擇
3．5．5 功率的合成與分配
3．6 小結(jié)
習(xí)題
第4章 非線性電路及其分析方法
4．1 引言
4．2 非線性電路的基本概念與非線性元件
4．2．1 非線性電路的基本概念
4．2．2 非線性元件
4．3 非線性電路的分析方法
4．3．1 非線性電路與線性電路分析方法的異同點(diǎn)
4．3．2 非線性電阻電路的近似解析分析
4．3．3 非線性動(dòng)態(tài)電路分析簡介(x)
4．4 非線性電路的應(yīng)用舉例
4．4．1 C類諧振功率放大器
4．4，2 D類和E類功率放大器(x)
4．4．3 倍頻器
4．4．4 模擬相乘器
4．4．5 時(shí)變參量電路與變頻器
4.5 小結(jié)
附錄 余弦脈沖系數(shù)表
習(xí)題
第5章 正弦波振蕩器
5．1 引言
5．2 LC振蕩器的基本工作原理
5．2．1 LC回路的自由振蕩現(xiàn)象
5．2．2 振蕩特性與振蕩條件
5．2．3 自給偏置對振蕩狀態(tài)的影響
5.3 LC振蕩器的電路分析
5．3．1 LC振蕩器的基本構(gòu)成
5．3．2 三點(diǎn)式振蕩器
5．4 振蕩器的頻率穩(wěn)定度
5．4．1 頻率穩(wěn)定度的計(jì)量
5．4．2 導(dǎo)致振蕩頻率不穩(wěn)定的原因
5．4．3 主要穩(wěn)頻措施
5．5 晶體振蕩器
5．5．1 石英諧振器的基本特性
5．5.2 晶體振蕩電路
5．6 負(fù)阻振蕩器(x)
5．6．1 負(fù)阻器件的基本特性
5．6．2 負(fù)阻振蕩電路
5．7 RC振蕩器與開關(guān)電容振蕩器
5．7．1 及C正弦波振蕩器
5．7．2 開關(guān)電容振蕩器
5．8 特殊振蕩現(xiàn)象(x)
5．8．1 間歇振蕩現(xiàn)象
5．8.2 頻率占據(jù)現(xiàn)象
5．8．3 寄生振蕩現(xiàn)象
5．9 小結(jié)
6．2．1 標(biāo)準(zhǔn)幅度調(diào)制
6．2．2 抑制載波調(diào)幅、單邊帶調(diào)幅和殘留邊帶調(diào)幅
6．2．3 正交幅度調(diào)制與解調(diào)
6．2．4 數(shù)字信號調(diào)幅
6．3 角度調(diào)制
6．3．1 角度調(diào)制的基本概念
6．3．2 頻率調(diào)制信號的性質(zhì)
6．3．3 實(shí)現(xiàn)頻率調(diào)制的方法與電路
6．3．4 調(diào)頻波的解調(diào)方法與電路
6．3．5 數(shù)字信號的相位調(diào)制
6．4 小結(jié)
習(xí)題
第7章 鎖相環(huán)路
7．1 引言
7．2 PLL基本原理
7．2．1 PLL的組成與數(shù)學(xué)表示式
7．2．2 PLL的環(huán)路方程與相位模型
7．3 PLL的線性分析
7．3．1 PLL的線性模型與傳遞函數(shù)
7．3．2 PLL的跟蹤特性
7．3．3 PLL的穩(wěn)態(tài)相差
7．3．4 PLL的頻率特性
7．3．5 PLL的穩(wěn)定性(ж)
7．3．6 PLL的噪聲特性(ж)
7．4 PLL的非線性分析
7．4．1 一階環(huán)路的非線性特性
7．4．2 二階環(huán)路的非線性特性
7．5 集成PLL主要部件
7．5．1 集成鑒相器
7．5．2 集成壓控振蕩器
7．6 PLL電路實(shí)例與應(yīng)用舉例(ж)
7．6．1 PLL電路實(shí)例
7．6．2 PLL應(yīng)用舉例
7．7 數(shù)字鎖相環(huán)路(ж)
7．7．1 數(shù)字鎖相環(huán)路的基本部件
7．7．2 數(shù)字鎖相環(huán)路的工作過程
7．7．3 數(shù)字鎖相環(huán)路的基本方程及模型
7．8 自動(dòng)頻率控制(AFC)電路
7．8．1 AFC電路的組成
7．8．2 AFC電路的基本特征
7．8．3 AFC電路應(yīng)用舉例(x)
7．9 小結(jié)
習(xí)題
附錄 集成鎖相環(huán)路宏模型(x)
第8章 頻率合成技術(shù)
8．1 引言
8．2 頻率合成器主要特性
8．2．1 頻率合成器的主要技術(shù)指標(biāo)
8．2．2 相位噪聲
8．3 直接頻率合成法
8．4 鎖相頻率合成法
8．4．1 鎖相頻率合成器的基本構(gòu)成
8．4．2 鎖相頻率合成器方案設(shè)計(jì)中的一些考慮(x)
8．4．3 鎖相頻率合成器的實(shí)際構(gòu)成方案(x)
8．5 直接數(shù)字頻率合成
8．5．1 直接數(shù)字頻率合成(DDS)的基本原理
8．5．2 直接數(shù)字頻率合成技術(shù)
8．5．3 直接數(shù)字頻率合成器性能以及方案設(shè)計(jì)中的一些考慮(x)
8．5．4 DDS／PLL組合式頻率合成器(x)
8．6 頻率合成器集成電路(x)
8．6．1 通用集成鎖相環(huán)頻率合成器
8．6．2 吞脈沖集成鎖相頻率合成器
8．6．3 直接數(shù)字頻率合成器專用芯片
8．7 小結(jié)
習(xí)題
名詞索引
參考文獻(xiàn)
注：帶(x)者為作者建議可列為選讀內(nèi)容的部分
Chapter 30 Data Converter Modeling
30.1 Sampling and Aliasing: A Modeling Approach
30.1.1 Impulse Sampling
A Note Concerning the AAF and RCF
Time-Domain Description of Reconstruction
Using SPICE for Spectral Analysis (Looking at the Spectrum of
a Signal)
Representing the Impulse Sampler''s Output in the Z-Domain
An Important Note
30.1.2 The Sample and Hold
SPICE Modeling the Sample and Hold
S/H Spectral Response
Circuit Concerns for Implementing the S/H
30.2 SPICE Models for DACs and ADCs
30.2.1 The Ideal DAC
SPICE Modeling Approach
30.2.2 The Ideal ADC
Summary
30.3 Quantization Noise.
30.3.1 Viewing the Quantization Noise Spectrum Using
Simulations
An Important Note
RMS Quantization Noise Voltage
Treating Quantization Noise as a Random Variable
Calculating RMS Quantization Noise Voltage from a Spectrum
The DFT''s Relationship to the Continuous Time Fourier
Transform
30,3.2 Quantization Noise Voltage Spectral Density
Reducing Quantization Noise Using Averaging
The Noise Spectral Density View of Averaging
An Important Note
Practical Implementation of Averaging in ADCs
Chapter 31 Data Converter SNR
31.1 Data Converter SNR: An Overview.
31.1.1 Effective Number of Bits
Signal-to-Noise Plus Distortion Ratio
Spurious-Free Dynamic Range
Dynamic Range
Specifying SNR and SNDR
31.1.2 Clock Jitter
Using Oversampling to Reduce Sampling Clock Jitter Stability
Requirements
A Practical Note
Modeling Clock Jitter with SPICE
Using Our SPICE Jitter Model
31.1.3 A Tool: The Spectral Density
The Spectral Density of Deterministic Signals: An Overview
The Spectral Density of Random Signals: An Overview
Specifying Phase Noise from Measured Data
31.2 Improving SNR Using Averaging
31.2.1 Using Averaging to Improve SNR
Spectral Density View of Averaging Revisited
An Important Observation
Jitter and Averaging
Relaxed Requirements Placed on the Antialiasing Filter
Data Converter Linearity Requirements
Adding a Noise Dither to the ADC Input
The Z-Plane
31.2.2 Decimating Filters for ADCs
The Accumulate and Dump
Averaging without Decimation
Relaxed Requirements Placed on the Antialiasing Filter
Revisited
Implementing Averaging Filters
Aliasing Concerns When Using Decimation
A Note Concerning Stability
Decimating Down to 2B
31.2.3 Interpolating Filters for DACs
The Dump and Interpolate
Practical Implementation of Interpolators
31.2.4 Bandpass and Highpass Sinc Filters
Canceling Zeroes to Create Highpass and Bandpass Filters
Frequency Sampling Filters
31.3 Using Feedback to Improve SNR
31.3.1 The Discrete Analog Integrator
A Note Concerning Block Diagrams
31.3.2 Modulators
Chapter 32 Noise-Shaping Data Converters
32.1 Noise-Shaping Fundamentals.
32.1.1 SPICE Models
Nonoverlapping Clock Generation and Switches
Op-Amp Modeling
SPICE Modeling a 1-Bit ADC
32.1.2 First-Order Noise-Shaping
A Digital First-Order NS Demodulator
Modulation Noise in First-Order NS Modulators
RMS Quantization Noise in a First-Order Modulator
Decimating and Filtering the Output of a NS Modulator
Implementing the Sinc Averaging Filter Revisited
Analog Sinc Averaging Filters using SPICE
Using our SPICE Sinc Filter Model
Analog Implementation of the First-Order NS Modulator
The Feedback DAC
Understanding Averaging and the Use of Digital Filtering with
the Modulator
Pattern Noise from DC Inputs (Limit Cycle Oscillations)
Integrator and Forward Modulator Gain
Comparator Gain, Offset, Noise, and Hysteresis
Op-Amp Gain (Integrator Leakage)
Op-Amp Settling Time
Op-Amp Offset
Op-Amp Input Referred Noise
Practical Implementation of the First-Order NS Modulator
FullyDifferential Modulator with a Single-Ended Input
32.1.3 Second-Order Noise-Shaping
Second-Order Modulator Topology
Integrator Gain
Implementing Feedback Gains in the DAI
Using Two Delaying Integrators to Implement the Second-Order
Modulator
Selecting Modulator (Integrator) Gains
Understanding Modulator SNR
32.2 Noise-Shaping Topologies
32.2.1 Higher-Order Modulators
M''h-Order Modulator Topology
Decimating the Output of an Mth-Order NS Modulator
Implementing Higher-Order, Single-Stage, Modulators
32.2.2 Multibit Modulators
Simulating a Multibit NS Modulator Using SPICE
Multibit Demodulator (Used in a NS DAC) Implementation (Error
Feedback)
Implementation Concerns
32.2.3 Cascaded Modulators
Second-Order (1-1) Modulators
Third-Order (1-1-1) Modulators
Third-Order (2-1) Modulators
Implementing the Additional Summing Input
32.2.4 Bandpass Modulators
Implementing a Bandpass Modulator
Chapter 33 Submicron CMOS Circuit Design 2
33.1 Submicron CMOS: Overview and Models
33.1.1 CMOS Process Flow
33.1.2 Capacitors and Resistors
Using a MOSFET as a Capacitor
Using a Native or Natural MOSFET Capacitor
The Floating MOS Capacitor
Metal Capacitors
An Important Note
Resistors
33.1.3 SPICE MOSFET Modeling
Model Selection
Model Parameters
An Important Note
A Note Concerning "Long L MOSFETs"
33.2 Digital Circuit Design
33.2.1 The MOSFET Switch
Bidirectional Switches
A Clocked Comparator
Common-Mode Noise Elimination
33.2.2 Delay Elements
33.2.3 An Adder
33.3 Analog Circuit Design.
33.3.1 Biasing
Selecting the Excess Gate Voltage
Selecting the Channel Length
Small-Signal Transconductance, gm
MOSFET Transition Frequency, fT
The Beta Multiplier Self-Biased Reference
33.3.20p-Amp Design
Output Swing
Slew-rate Concerns
Differential Output Op-Amp
33.3.3 Circuit Noise
Thermal Noise
The Spectral Characteristics of Thermal Noise
Noise Equivalent Bandwidth
MOSFET Noise
Noise Performance of the Source-Follower
Noise Performance of a Cascade of Amplifiers
DAI Noise Performance
Chapter 34 Implementing Data Converters
34.1 R-2R Topologies for DACs
34.1.1 The Current-Mode R-2R DAC
34.1.2 The Voltage-Mode R-2R DAC
34.1.3 A Wide-Swing Current-Mode R-2R DAC
DNL Analysis
INL Analysis
Switches
Experimental Results
Improving DNL (Segmentation)
Trimming DAC Offset
Trimming DAC Gain
Improving INL by Calibration
34.1.4 Topologies Without an Op-Amp
The Voltage-Mode DAC
Two Important Notes Concerning Glitches
The Current-Mode (Current Steering) DAC
34.20p-Amps in Data Converters.
Gain Bandwidth Product of the Noninverting Op-Amp Topology
Gain Bandwidth Product of the Inverting Op-Amp Topology
34.2.10p-Amp Gain
34.2.20p-Amp Unity Gain Frequency
34.2.30p-Amp Offset
Adding an Auxiliary Input Port
34.3 Implementing ADCs
34.3.1 Implementing the S/H
A Single-Ended to Differential Output S/H
34.3.2 The Cyclic ADC
Comparator Placement
Implementing Subtraction in the S/H
Understanding Output Swing
34.3.3 The Pipeline ADC
Using 1.5 Bits/Stage
Capacitor Error Averaging
Comparator Placement
Clock Generation
Offsets and Alternative Design Topologies
Dynamic CMFB
Layout of Pipelined ADCs
Chapter 35 Integrator-Based CMOS Filters
35.1 Integrator Building Blocks
35.1.1 Lowpass Filters
35.1.2 Active-RC Integrators
Effects of Finite Op-Amp Gain Bandwidth Product
Active-RC SNR
35,1.3 MOSFET-C Integrators
Why use an Active Circuit (an Op-Amp)
35.1.4 gm-C (Transconductor-C) Integrators
Common-Mode Feedback Considerations
A High-Frequency Transconductor
35.1.5 Discrete-Time Integrators
An important Note
Exact Frequency Response of a First-Order Discrete- Time
Digital (or Ideal SC) Filter
35.2 Filtering Topologies.
35.2.1 The Bilinear Transfer Function
Active-RC Implementation
Transconductor-C Implementation
Switched-Capacitor Implementation
Digital Filter implementation
The Canonic Form (or Standard Form) of a Digital Filter
35.2.2 The Biquadratic Transfer Function
Active-RC Implementation
Switched-Capacitor Implementation
High Q
Q Peaking and Instability
Transconductor-C Implementation
The Digital Biquad
35.3 Filters using Noise-Shaping.
Removing Modulation Noise
Implementing the Multipliers
Chapter 36 At the Bench
36.1 A Push-Pull Amplifier
Deadbug Prototyping
Probing
Testing the Circuit
36.2 A First-Order Noise-Shaping Modulator
Prototyping the Modulator
36.3 Measuring 1/f Noise
MOSFET Noise
Input-Referred Noise Voltage
Chopper Stabilization
36,4 A Discrete Analog Integrator
Clock Generation
Prototyping the Filter
36.5 Quantization Noise
Prototyping the ADC Circuit
Index
About the Author
本書為國外高校電子信息類優(yōu)秀教材(英文影印版)之一。
本書介紹了MATLAB在數(shù)字信號處理中的應(yīng)用，包括時(shí)分信號與系統(tǒng)，時(shí)分傅里葉變換，2變換，離散傅里葉變換，數(shù)字濾波器結(jié)構(gòu)，F(xiàn)IR濾波器設(shè)計(jì)，IIR濾波器設(shè)計(jì)，以及在自適應(yīng)濾波器、通信中的應(yīng)用。本書通過使用MATLAB這一"動(dòng)態(tài)實(shí)驗(yàn)室"幫助讀者提高解決問題的能力和嚴(yán)謹(jǐn)思維的能力。
本書可作為電子工程、通信專業(yè)本科生教材，也可作為相關(guān)專業(yè)工程技術(shù)人員的參考書。
I INTRODUCTION 1
Overview of Digital Signal Processing 2
A Few Words about MATLAB 5
2 DISCRETE-TIME SIGNALS AND SYSTEMS
Discrete-time Signals 7
Discrete Systems 20
Convolution 22
Difference Equations 29
Problems 35
3 THE DISCRETE-TIME FOURIER ANALYSIS 40
The Discrete-time Fourier Transform (DTFT) 40
The Properties of the DTFT 47
The Frequency Domain Representation of LTl Systems 53
Sampling and Reconstruction of Analog Signals 60
Problems 74
4 THE z-TRANSFORM 80
The Bilateral z-Transform 80
Important Properties of the =-Transform 84
Inversion of the z-Transform 8g
System Representation in the z-Domain 95
Solutions of the Difference Equations 105
Problems 111
5 THE DISCRETE FOURIER TRANSFORM 116
The Discrete Fourier Series 117
Sampling and Reconstruction in the z-Domain 124
The Discrete Fourier Transform 12g
Properties of the Discrete Fourier Transform 13g
Linear Convolution using the DFT 154
The Fast Fourier Transform 160
Problems 172
6 DIGITAL FILTER STRUCTURES
182
Basic Elements 183
IIR Filter Structures 183
FIR Filter Structures 197
Lattice Filter Structures 208
Problems 219
7 FIR FILTER DESIGN 224
Preliminaries 224
Properties of Linear-phase FIR Filters 228
Window Design Techniques 243
Frequency Sampling Design Techniques 264
Optimal Equiripple Design Technique 277
Problems 294
8 IIR FILTER DESIGN 301
Some Preliminaries 302
Characteristics of Prototype Analog Filters 305
Analog-to-Digital Filter Transformations 327
Lowpass Filter Design Using MATLAB 345
Frequency-band Transformations 350
Comparison of FIR vs. IIR Filters 363
Problems 364
9
APPLICATIONS IN ADAPTIVE FILTERING 371
LMS Algorithm for Coefficient Adjustment 373
System Identification or System Modeling 376
Suppression of Narrowband Interference in a
Wideband Signal 377
Adaptive Lin Adaptive Channel Equalization 380
Summary 383
10 APPLICATIONS IN COMMUNICATIONS 384
Pulse-Code Modulation 384
Differential PCM (DPCM) 388
Adaptive PCM and DPCM (ADPCM) 392
Delta Modulation (DM) 396
Linear Predictive Coding (LPC) of Speech 399
Dual-tone Multifrequency (DTMF) Signals 403
Binary Digital Communications 408
Spread-Spectrum Communications 409
Summary 411
BIBLIOGRAPHY 412
INDEX 413
第1章 緒論
1．1 通信系統(tǒng)的基本概念
1．1．1 通信系統(tǒng)的組成
1．1．2 通信系統(tǒng)的基本特性
1.1．3 通信系統(tǒng)的信道
1．1．4 通信系統(tǒng)中的信號
1．1．5 通信系統(tǒng)中的發(fā)送與接收設(shè)備
1．2 信號傳輸?shù)幕締栴}
1．2．1 信號通過線性系統(tǒng)
1．2．2 信號通過非線性系統(tǒng)
1．2．3 干擾
1．3 通信電路的基本形式
1．4 關(guān)于本書的內(nèi)容
1．4．1 關(guān)于信號變換的理論和技術(shù)
1．4．2 關(guān)于電路
第2章 濾波器
2．1 引言
2．2 濾波器的特性和分類
2．2．1 濾波器的特性
2．2．2 濾波器的分類
2．3 LC濾波器；
2．3.1 LC串、并聯(lián)諧振回路
2．3．2 般LC濾波器
2．4 聲表面波濾波器
2．5 有源RC濾波器
2．5．1 構(gòu)成有源RC濾波器的單元電路
2．5．2 運(yùn)算仿真法實(shí)現(xiàn)有源RC濾波器
2. 5．3 級聯(lián)法實(shí)現(xiàn)有源RC濾波器(x)
2．5．4 自動(dòng)校正有源RC濾波器(x)
2．6 抽樣數(shù)據(jù)濾波器(x)
2．6．1 抽樣數(shù)據(jù)單元電路
2．6．2 抽樣數(shù)據(jù)濾波器
2．6．3 連續(xù)域到離散域的映射
2．7 小結(jié)
習(xí)題
第3章 高頻放大器
3．1 引言
3．2 晶體管的高頻小信號等效電路和參數(shù)
3．2．1 雙極型晶體管混合x型等效電路和參數(shù)
3．2．2 場效應(yīng)管的等效電路和參數(shù)
3．2．3 晶體管的y參數(shù)等效電路
3．3 高頻小信號寬帶放大器
3．3．1 概述
3．3．2 共發(fā)射極放大器
3．3．3 共基極放大器
3．3．4 共發(fā)共基級聯(lián)電路
3．3．5 場效應(yīng)管高頻小信號放大器
3．3．6 展寬頻帶的措施(x)
3．3．7 自動(dòng)增益控制(ACC)電路
3．4 放大器的噪聲
3．4．1 電阻的熱噪聲
3．4．2 電子器件的噪聲
3．4．3 噪聲系數(shù)
3．4．4 接收機(jī)的靈敏度與最小可檢測信號
3．4．5 噪聲溫度
3．4．6 低噪聲放大器(x)
3．5 寬帶功率放大器(x)
3．5．1 A類功率放大器的基本電路特性
3．5．2 B類與AB類功率放大器
3．5．3 傳輸線變壓器
3．5．4 寬頻帶放大器晶體管工作狀態(tài)的選擇
3．5．5 功率的合成與分配
3．6 小結(jié)
習(xí)題
第4章 非線性電路及其分析方法
4．1 引言
4．2 非線性電路的基本概念與非線性元件
4．2．1 非線性電路的基本概念
4．2．2 非線性元件
4．3 非線性電路的分析方法
4．3．1 非線性電路與線性電路分析方法的異同點(diǎn)
4．3．2 非線性電阻電路的近似解析分析
4．3．3 非線性動(dòng)態(tài)電路分析簡介(x)
4．4 非線性電路的應(yīng)用舉例
4．4．1 C類諧振功率放大器
4．4，2 D類和E類功率放大器(x)
4．4．3 倍頻器
4．4．4 模擬相乘器
4．4．5 時(shí)變參量電路與變頻器
4.5 小結(jié)
附錄 余弦脈沖系數(shù)表
習(xí)題
第5章 正弦波振蕩器
5．1 引言
5．2 LC振蕩器的基本工作原理
5．2．1 LC回路的自由振蕩現(xiàn)象
5．2．2 振蕩特性與振蕩條件
5．2．3 自給偏置對振蕩狀態(tài)的影響
5.3 LC振蕩器的電路分析
5．3．1 LC振蕩器的基本構(gòu)成
5．3．2 三點(diǎn)式振蕩器
5．4 振蕩器的頻率穩(wěn)定度
5．4．1 頻率穩(wěn)定度的計(jì)量
5．4．2 導(dǎo)致振蕩頻率不穩(wěn)定的原因
5．4．3 主要穩(wěn)頻措施
5．5 晶體振蕩器
5．5．1 石英諧振器的基本特性
5．5.2 晶體振蕩電路
5．6 負(fù)阻振蕩器(x)
5．6．1 負(fù)阻器件的基本特性
5．6．2 負(fù)阻振蕩電路
5．7 RC振蕩器與開關(guān)電容振蕩器
5．7．1 及C正弦波振蕩器
5．7．2 開關(guān)電容振蕩器
5．8 特殊振蕩現(xiàn)象(x)
5．8．1 間歇振蕩現(xiàn)象
5．8.2 頻率占據(jù)現(xiàn)象
5．8．3 寄生振蕩現(xiàn)象
5．9 小結(jié)
6．2．1 標(biāo)準(zhǔn)幅度調(diào)制
6．2．2 抑制載波調(diào)幅、單邊帶調(diào)幅和殘留邊帶調(diào)幅
6．2．3 正交幅度調(diào)制與解調(diào)
6．2．4 數(shù)字信號調(diào)幅
6．3 角度調(diào)制
6．3．1 角度調(diào)制的基本概念
6．3．2 頻率調(diào)制信號的性質(zhì)
6．3．3 實(shí)現(xiàn)頻率調(diào)制的方法與電路
6．3．4 調(diào)頻波的解調(diào)方法與電路
6．3．5 數(shù)字信號的相位調(diào)制
6．4 小結(jié)
習(xí)題
第7章 鎖相環(huán)路
7．1 引言
7．2 PLL基本原理
7．2．1 PLL的組成與數(shù)學(xué)表示式
7．2．2 PLL的環(huán)路方程與相位模型
7．3 PLL的線性分析
7．3．1 PLL的線性模型與傳遞函數(shù)
7．3．2 PLL的跟蹤特性
7．3．3 PLL的穩(wěn)態(tài)相差
7．3．4 PLL的頻率特性
7．3．5 PLL的穩(wěn)定性(ж)
7．3．6 PLL的噪聲特性(ж)
7．4 PLL的非線性分析
7．4．1 一階環(huán)路的非線性特性
7．4．2 二階環(huán)路的非線性特性
7．5 集成PLL主要部件
7．5．1 集成鑒相器
7．5．2 集成壓控振蕩器
7．6 PLL電路實(shí)例與應(yīng)用舉例(ж)
7．6．1 PLL電路實(shí)例
7．6．2 PLL應(yīng)用舉例
7．7 數(shù)字鎖相環(huán)路(ж)
7．7．1 數(shù)字鎖相環(huán)路的基本部件
7．7．2 數(shù)字鎖相環(huán)路的工作過程
7．7．3 數(shù)字鎖相環(huán)路的基本方程及模型
7．8 自動(dòng)頻率控制(AFC)電路
7．8．1 AFC電路的組成
7．8．2 AFC電路的基本特征
7．8．3 AFC電路應(yīng)用舉例(x)
7．9 小結(jié)
習(xí)題
附錄 集成鎖相環(huán)路宏模型(x)
第8章 頻率合成技術(shù)
8．1 引言
8．2 頻率合成器主要特性
8．2．1 頻率合成器的主要技術(shù)指標(biāo)
8．2．2 相位噪聲
8．3 直接頻率合成法
8．4 鎖相頻率合成法
8．4．1 鎖相頻率合成器的基本構(gòu)成
8．4．2 鎖相頻率合成器方案設(shè)計(jì)中的一些考慮(x)
8．4．3 鎖相頻率合成器的實(shí)際構(gòu)成方案(x)
8．5 直接數(shù)字頻率合成
8．5．1 直接數(shù)字頻率合成(DDS)的基本原理
8．5．2 直接數(shù)字頻率合成技術(shù)
8．5．3 直接數(shù)字頻率合成器性能以及方案設(shè)計(jì)中的一些考慮(x)
8．5．4 DDS／PLL組合式頻率合成器(x)
8．6 頻率合成器集成電路(x)
8．6．1 通用集成鎖相環(huán)頻率合成器
8．6．2 吞脈沖集成鎖相頻率合成器
8．6．3 直接數(shù)字頻率合成器專用芯片
8．7 小結(jié)
習(xí)題
名詞索引
參考文獻(xiàn)
注：帶(x)者為作者建議可列為選讀內(nèi)容的部分
Chapter 30 Data Converter Modeling
30.1 Sampling and Aliasing: A Modeling Approach
30.1.1 Impulse Sampling
A Note Concerning the AAF and RCF
Time-Domain Description of Reconstruction
Using SPICE for Spectral Analysis (Looking at the Spectrum of
a Signal)
Representing the Impulse Sampler''s Output in the Z-Domain
An Important Note
30.1.2 The Sample and Hold
SPICE Modeling the Sample and Hold
S/H Spectral Response
Circuit Concerns for Implementing the S/H
30.2 SPICE Models for DACs and ADCs
30.2.1 The Ideal DAC
SPICE Modeling Approach
30.2.2 The Ideal ADC
Summary
30.3 Quantization Noise.
30.3.1 Viewing the Quantization Noise Spectrum Using
Simulations
An Important Note
RMS Quantization Noise Voltage
Treating Quantization Noise as a Random Variable
Calculating RMS Quantization Noise Voltage from a Spectrum
The DFT''s Relationship to the Continuous Time Fourier
Transform
30,3.2 Quantization Noise Voltage Spectral Density
Reducing Quantization Noise Using Averaging
The Noise Spectral Density View of Averaging
An Important Note
Practical Implementation of Averaging in ADCs
Chapter 31 Data Converter SNR
31.1 Data Converter SNR: An Overview.
31.1.1 Effective Number of Bits
Signal-to-Noise Plus Distortion Ratio
Spurious-Free Dynamic Range
Dynamic Range
Specifying SNR and SNDR
31.1.2 Clock Jitter
Using Oversampling to Reduce Sampling Clock Jitter Stability
Requirements
A Practical Note
Modeling Clock Jitter with SPICE
Using Our SPICE Jitter Model
31.1.3 A Tool: The Spectral Density
The Spectral Density of Deterministic Signals: An Overview
The Spectral Density of Random Signals: An Overview
Specifying Phase Noise from Measured Data
31.2 Improving SNR Using Averaging
31.2.1 Using Averaging to Improve SNR
Spectral Density View of Averaging Revisited
An Important Observation
Jitter and Averaging
Relaxed Requirements Placed on the Antialiasing Filter
Data Converter Linearity Requirements
Adding a Noise Dither to the ADC Input
The Z-Plane
31.2.2 Decimating Filters for ADCs
The Accumulate and Dump
Averaging without Decimation
Relaxed Requirements Placed on the Antialiasing Filter
Revisited
Implementing Averaging Filters
Aliasing Concerns When Using Decimation
A Note Concerning Stability
Decimating Down to 2B
31.2.3 Interpolating Filters for DACs
The Dump and Interpolate
Practical Implementation of Interpolators
31.2.4 Bandpass and Highpass Sinc Filters
Canceling Zeroes to Create Highpass and Bandpass Filters
Frequency Sampling Filters
31.3 Using Feedback to Improve SNR
31.3.1 The Discrete Analog Integrator
A Note Concerning Block Diagrams
31.3.2 Modulators
Chapter 32 Noise-Shaping Data Converters
32.1 Noise-Shaping Fundamentals.
32.1.1 SPICE Models
Nonoverlapping Clock Generation and Switches
Op-Amp Modeling
SPICE Modeling a 1-Bit ADC
32.1.2 First-Order Noise-Shaping
A Digital First-Order NS Demodulator
Modulation Noise in First-Order NS Modulators
RMS Quantization Noise in a First-Order Modulator
Decimating and Filtering the Output of a NS Modulator
Implementing the Sinc Averaging Filter Revisited
Analog Sinc Averaging Filters using SPICE
Using our SPICE Sinc Filter Model
Analog Implementation of the First-Order NS Modulator
The Feedback DAC
Understanding Averaging and the Use of Digital Filtering with
the Modulator
Pattern Noise from DC Inputs (Limit Cycle Oscillations)
Integrator and Forward Modulator Gain
Comparator Gain, Offset, Noise, and Hysteresis
Op-Amp Gain (Integrator Leakage)
Op-Amp Settling Time
Op-Amp Offset
Op-Amp Input Referred Noise
Practical Implementation of the First-Order NS Modulator
FullyDifferential Modulator with a Single-Ended Input
32.1.3 Second-Order Noise-Shaping
Second-Order Modulator Topology
Integrator Gain
Implementing Feedback Gains in the DAI
Using Two Delaying Integrators to Implement the Second-Order
Modulator
Selecting Modulator (Integrator) Gains
Understanding Modulator SNR
32.2 Noise-Shaping Topologies
32.2.1 Higher-Order Modulators
M''h-Order Modulator Topology
Decimating the Output of an Mth-Order NS Modulator
Implementing Higher-Order, Single-Stage, Modulators
32.2.2 Multibit Modulators
Simulating a Multibit NS Modulator Using SPICE
Multibit Demodulator (Used in a NS DAC) Implementation (Error
Feedback)
Implementation Concerns
32.2.3 Cascaded Modulators
Second-Order (1-1) Modulators
Third-Order (1-1-1) Modulators
Third-Order (2-1) Modulators
Implementing the Additional Summing Input
32.2.4 Bandpass Modulators
Implementing a Bandpass Modulator
Chapter 33 Submicron CMOS Circuit Design 2
33.1 Submicron CMOS: Overview and Models
33.1.1 CMOS Process Flow
33.1.2 Capacitors and Resistors
Using a MOSFET as a Capacitor
Using a Native or Natural MOSFET Capacitor
The Floating MOS Capacitor
Metal Capacitors
An Important Note
Resistors
33.1.3 SPICE MOSFET Modeling
Model Selection
Model Parameters
An Important Note
A Note Concerning "Long L MOSFETs"
33.2 Digital Circuit Design
33.2.1 The MOSFET Switch
Bidirectional Switches
A Clocked Comparator
Common-Mode Noise Elimination
33.2.2 Delay Elements
33.2.3 An Adder
33.3 Analog Circuit Design.
33.3.1 Biasing
Selecting the Excess Gate Voltage
Selecting the Channel Length
Small-Signal Transconductance, gm
MOSFET Transition Frequency, fT
The Beta Multiplier Self-Biased Reference
33.3.20p-Amp Design
Output Swing
Slew-rate Concerns
Differential Output Op-Amp
33.3.3 Circuit Noise
Thermal Noise
The Spectral Characteristics of Thermal Noise
Noise Equivalent Bandwidth
MOSFET Noise
Noise Performance of the Source-Follower
Noise Performance of a Cascade of Amplifiers
DAI Noise Performance
Chapter 34 Implementing Data Converters
34.1 R-2R Topologies for DACs
34.1.1 The Current-Mode R-2R DAC
34.1.2 The Voltage-Mode R-2R DAC
34.1.3 A Wide-Swing Current-Mode R-2R DAC
DNL Analysis
INL Analysis
Switches
Experimental Results
Improving DNL (Segmentation)
Trimming DAC Offset
Trimming DAC Gain
Improving INL by Calibration
34.1.4 Topologies Without an Op-Amp
The Voltage-Mode DAC
Two Important Notes Concerning Glitches
The Current-Mode (Current Steering) DAC
34.20p-Amps in Data Converters.
Gain Bandwidth Product of the Noninverting Op-Amp Topology
Gain Bandwidth Product of the Inverting Op-Amp Topology
34.2.10p-Amp Gain
34.2.20p-Amp Unity Gain Frequency
34.2.30p-Amp Offset
Adding an Auxiliary Input Port
34.3 Implementing ADCs
34.3.1 Implementing the S/H
A Single-Ended to Differential Output S/H
34.3.2 The Cyclic ADC
Comparator Placement
Implementing Subtraction in the S/H
Understanding Output Swing
34.3.3 The Pipeline ADC
Using 1.5 Bits/Stage
Capacitor Error Averaging
Comparator Placement
Clock Generation
Offsets and Alternative Design Topologies
Dynamic CMFB
Layout of Pipelined ADCs
Chapter 35 Integrator-Based CMOS Filters
35.1 Integrator Building Blocks
35.1.1 Lowpass Filters
35.1.2 Active-RC Integrators
Effects of Finite Op-Amp Gain Bandwidth Product
Active-RC SNR
35,1.3 MOSFET-C Integrators
Why use an Active Circuit (an Op-Amp)
35.1.4 gm-C (Transconductor-C) Integrators
Common-Mode Feedback Considerations
A High-Frequency Transconductor
35.1.5 Discrete-Time Integrators
An important Note
Exact Frequency Response of a First-Order Discrete- Time
Digital (or Ideal SC) Filter
35.2 Filtering Topologies.
35.2.1 The Bilinear Transfer Function
Active-RC Implementation
Transconductor-C Implementation
Switched-Capacitor Implementation
Digital Filter implementation
The Canonic Form (or Standard Form) of a Digital Filter
35.2.2 The Biquadratic Transfer Function
Active-RC Implementation
Switched-Capacitor Implementation
High Q
Q Peaking and Instability
Transconductor-C Implementation
The Digital Biquad
35.3 Filters using Noise-Shaping.
Removing Modulation Noise
Implementing the Multipliers
Chapter 36 At the Bench
36.1 A Push-Pull Amplifier
Deadbug Prototyping
Probing
Testing the Circuit
36.2 A First-Order Noise-Shaping Modulator
Prototyping the Modulator
36.3 Measuring 1/f Noise
MOSFET Noise
Input-Referred Noise Voltage
Chopper Stabilization
36,4 A Discrete Analog Integrator
Clock Generation
Prototyping the Filter
36.5 Quantization Noise
Prototyping the ADC Circuit
Index
About the Author
本書為國外高校電子信息類優(yōu)秀教材(英文影印版)之一。
本書介紹了MATLAB在數(shù)字信號處理中的應(yīng)用，包括時(shí)分信號與系統(tǒng)，時(shí)分傅里葉變換，2變換，離散傅里葉變換，數(shù)字濾波器結(jié)構(gòu)，F(xiàn)IR濾波器設(shè)計(jì)，IIR濾波器設(shè)計(jì)，以及在自適應(yīng)濾波器、通信中的應(yīng)用。本書通過使用MATLAB這一"動(dòng)態(tài)實(shí)驗(yàn)室"幫助讀者提高解決問題的能力和嚴(yán)謹(jǐn)思維的能力。
本書可作為電子工程、通信專業(yè)本科生教材，也可作為相關(guān)專業(yè)工程技術(shù)人員的參考書。
I INTRODUCTION 1
Overview of Digital Signal Processing 2
A Few Words about MATLAB 5
2 DISCRETE-TIME SIGNALS AND SYSTEMS
Discrete-time Signals 7
Discrete Systems 20
Convolution 22
Difference Equations 29
Problems 35
3 THE DISCRETE-TIME FOURIER ANALYSIS 40
The Discrete-time Fourier Transform (DTFT) 40
The Properties of the DTFT 47
The Frequency Domain Representation of LTl Systems 53
Sampling and Reconstruction of Analog Signals 60
Problems 74
4 THE z-TRANSFORM 80
The Bilateral z-Transform 80
Important Properties of the =-Transform 84
Inversion of the z-Transform 8g
System Representation in the z-Domain 95
Solutions of the Difference Equations 105
Problems 111
5 THE DISCRETE FOURIER TRANSFORM 116
The Discrete Fourier Series 117
Sampling and Reconstruction in the z-Domain 124
The Discrete Fourier Transform 12g
Properties of the Discrete Fourier Transform 13g
Linear Convolution using the DFT 154
The Fast Fourier Transform 160
Problems 172
6 DIGITAL FILTER STRUCTURES
182
Basic Elements 183
IIR Filter Structures 183
FIR Filter Structures 197
Lattice Filter Structures 208
Problems 219
7 FIR FILTER DESIGN 224
Preliminaries 224
Properties of Linear-phase FIR Filters 228
Window Design Techniques 243
Frequency Sampling Design Techniques 264
Optimal Equiripple Design Technique 277
Problems 294
8 IIR FILTER DESIGN 301
Some Preliminaries 302
Characteristics of Prototype Analog Filters 305
Analog-to-Digital Filter Transformations 327
Lowpass Filter Design Using MATLAB 345
Frequency-band Transformations 350
Comparison of FIR vs. IIR Filters 363
Problems 364
9
APPLICATIONS IN ADAPTIVE FILTERING 371
LMS Algorithm for Coefficient Adjustment 373
System Identification or System Modeling 376
Suppression of Narrowband Interference in a
Wideband Signal 377
Adaptive Lin Adaptive Channel Equalization 380
Summary 383
10 APPLICATIONS IN COMMUNICATIONS 384
Pulse-Code Modulation 384
Differential PCM (DPCM) 388
Adaptive PCM and DPCM (ADPCM) 392
Delta Modulation (DM) 396
Linear Predictive Coding (LPC) of Speech 399
Dual-tone Multifrequency (DTMF) Signals 403
Binary Digital Communications 408
Spread-Spectrum Communications 409
Summary 411
BIBLIOGRAPHY 412
INDEX 413